The present disclosure generally relates to three-dimensional integrated circuit (IC) devices. In particular, this disclosure relates to arrangements of multiple integrated circuit chips in a stacked configuration, interconnected by through-silicon vias (TSVs).
A TSV may be a vertical electrical connection structure that may pass partially or completely through a semiconductor die. TSVs may be formed in a semiconductor die, for example, by using an etching process to create a hole through the die, depositing an insulating/lining material on the surface of the hole and surrounding semiconductor, and subsequently filling the hole with a conductive material, such as tungsten, copper or aluminum. The conductive material may be used to electrically connect circuits formed on one planar side of a first semiconductor die to circuits of a second semiconductor die, stacked against the other planar side of the first die.
A TSV may be useful in enabling stacking and electrical interconnection of multiple IC chips to create high-density circuit structures having relatively short interconnections, high performance, and high density. One such circuit structure, known as a stacked memory device, may include a plurality of memory chips vertically interconnected to each other, and to a die that includes logic functions. Stacked memory device logic functions may include management of memory operations such as reading, writing, maintenance, and interface with external components, such as a processor chip.